The first PCB design of the open source voltmeter is ready

After 5 years of researching, developing and testing, I'm ready with the first PCB design:

The main PCB fits in 10x10cm layout and contains 4 modules : Analog front-end with OVP and two voltage ranges, ADC based on LTC2440, Voltage Reference based on LTC6655 and power supply using classic LM317/LM337 LDO. 

The PCB does not includes the controller for reading out and displaying the measurement results from the ADC.

I have to double check availability of the components, schematics and layout for possible errors before ordering all PCBs next week.

Analog front end schematics:

ADC schematics:

Power supply and voltage references schematics:

There are 2 more PCB : 

- one for AC input circuit with over-voltage protection using GDT and varistors (based on IEC 60950-1 schematics)  ̶a̶n̶d̶ ̶p̶r̶o̶t̶e̶c̶t̶i̶o̶n̶ ̶a̶g̶a̶i̶n̶s̶t̶ ̶i̶n̶t̶e̶r̶f̶e̶r̶e̶n̶c̶e̶ ̶v̶o̶l̶t̶a̶g̶e̶ ̶f̶r̶o̶m̶ ̶t̶h̶e̶ ̶m̶a̶i̶n̶s̶. A friend of mine gave me advice, that main filter is not needed when transformer is used, because it acts like low pass filter for external interference. Only if switching power supplies are used, it is worth to place such of filter. A reader of the blog notice that the transformer is not ideal and always a capacitance exists between the primary and secondary side. Which means that any AC signal (noise) can pass through the transformer. The frequency band is limited to the capacity value and the transformer's frequency loss. So far I was not able to find a tests results about this impact. I found an application note from Schaffner where noise filter is placed between a main line and linear power supply. 

- one for AC-DC conversion which includes again over-voltage protection using TVS diodes and CLC ripple filter. 

I paid special attention for input over-voltage protection after 2 times literally burning the op-amp in my LTZ1000 based 10V voltage reference due mains AC over-voltages. 

Here is the AC input PCB:

Here is the AC-DC PCB:

The AC-DC PCB supports 2 sizes of transformers.

Based on LTSpice simulation and LM317/337 ripple rejection vs. output load current chart, I expect to have around 15uV noise in the 0.1-0.3A current load range after LDO outputs.

And one more news : finally I bought an Agilent 3458A DMM :-)

The DMM is 10 years old and I will make later a post about the modifications and testing some DMM parameters, I was able to made. This will include also a INL against Programmable Josephson voltage standard. 

I think to make a voltage calibrator based on AD5791 DAC and with the help of the 3458a linearity I can measure the real INL of the AD5791. Once this is done, I will be able to measure the INL of the open DCM voltmeter using the AD5791 based calibrator. 

Revised analog front-end : Replacing the analog switch, part 4/4

In the post for the automatic voltage range, I used the analog switch ADG5419 to switch between the low and the high voltage ranges. I was wondering if the switch can be replaced with the shutdown feature of the LTC2057 op-amp. According the datasheet when the LTC2057 is in the shutdown mode : "... the output presents a high impedance to external circuitry". If the outputs of the op-amps are shorted and the SD inputs are feed with opposite signals for each op-amp, in theory this is equivalent to a SPDT switch. The switch is not expensive one (it cost around 5USD), but the maximum voltage which can stand (+/- 22V) was less than the voltage which I will use for the LTC2057HV. So usage of the ADG5419 cost me 2 more power rails which I want to avoid.

Тhis raised the following question : what kind of glue logic ("A" in the schematics above) I have to put between the outputs of the MAX990  comparators and the SD/SDCOM op-amp inputs? 

The output pin of the MAX990 is an open drain and a pull-up resistor to the positive rail have to be added. The voltage outputs of the MAX990 are between -2.5V+Vds(of the open-drain stage) when input voltage is above 2.048V and +2.5V when input voltage is below 2.048V.

From the LTC2057 datasheet we have the following information: "Shutdown control is accomplished through differential signaling. This method allows for low voltage digital control logic to operate independently of the amplifier’s high voltage supply rails.". And the tables with the logic and operating voltage ranges:

From the operating voltage range we had the restriction that voltage between the SD and SDCOM must be no more than 5.4V and it should be between the op-amp's power rails (except for the SDCOM max value). This was fine as far as the MAX990 outputs are between -2.5V and +2.5V. If the SDCOM is connected to the -2.5V power rail, I need two opposite signals from the MAX990 outputs which to be connected to the SD pins. 

I thought : why not to put an NOR gate 74x logic? The negative input voltage is not a problem if the Vss is connected to the -2.5V power rail and the Vcc is connected to the +2.5V. So, I made a breadboard proof of concept and putting the scope probe on the shorted outputs of the LTC2057 op-amps, I got a very clean, 2 us transition time between the two input signals.

Breadboarding automatic voltage range

The proof of concept automatic voltage range is ready and it is working as expected.

The automatic voltage range is based on voltage divider, window comparator and single-pole, dual-throw (SPDT) switch. The middle point of voltage divider is connected to a window comparator which triggers input signal to the SPDT when the voltage is greater then fixed positive and negative threshold. In result the SPDT switch connects middle point of the voltage divider to the ADC buffer. When the voltage is less then the threshold, SPDT switch connect directly the output of the input buffer to the ADC buffer.

I made a breadboard with the following components:

• Input buffer LTC2057.
• Voltage divider with LT5400-3 (quad matched resistor network). This is the 100K/10K variant, but the final should be 9K/1K (LT5400-8) for 1:10 ratio and lower resistor noise.
• MAX990 as window comparator. 
• ADG5419 SPDT switch. Here I used IC solution, but pair of P and N-channel MOSFET can be used too for cost reduction. 
• MCP1501 voltage reference 2.048V with MCP6061T for reference negative voltage.  The voltage reference was divided with the spare resistors from the LT5400-3 which is the stable voltage threshold +/- 0.2048V for the window comparator.  
• LTC2052 : 2 additional op-amp buffers for input of the SPDT switch, one for the window comparator input and one for buffering the input of the negative voltage threshold.  

When the input voltage is less than 2.048V and greater than -2.048V, the comparator output is in a low logical level and the SPDT switch connects direct the LTC2057 to the ADC buffer. When the input voltage is greater than 2.048V or less than -2.048V, the comparator output is in high logical level and the SPDT switch connect the middle point of the voltage divider to the ADC buffer.

To use low cost, low voltage window comparators, the middle point of the voltage divider is connected to comparators. In this case the second pair of LT5400 resistors are used for decreasing the comparator's voltage reference.

The reference voltage of 2.048 was selected, because the SPDT switch needs time to switches between input buffer and voltage divider. If this time is too long, the ADC buffer and ADC inputs can be damaged by input voltage if power supply of the buffer is less then the input voltage. The maximum input voltage of the LTC2440 ADC is now 2.5V with the dual supply schematics. The rising slew rate of the LTC2057 is typically 1.3V/uS, which means that maximum time for switching should be no more then 0.347uS [(2.5-2.048)/1.3].

Picture of the breadboard and the power supply is shown below. This is the most density breadboard which I had ever made. From left to the right are placed : LTC2057, LT5400-3, ADG5419, MAX990, MCP1501 and MCP6061T. There was no space left for the ADC input buffer (LT1001A) so I have to place it in the ADC breadboard later.

The picture above is before to place additional op-amp buffers for the SPDT switch and for the comparator. The reasons behind this I found during testing functionallity of the schematics:

- If one of the switch is switched off, there is a float voltage which influence the input of the voltage comparator. In result when the higher or lower voltage than the comparator threshold is applied, the switch does not switches at all.

- During the noise test I found that input of the MAX990 comparators are too noisy, so adding one more low noise op-amp in front of the comparators resolved the issue. 

I used the LTC2052 quad op-amps which I had in stock from the ohmmeter schematics. Note that the maximum supply voltage for the op-amp connected directly after input buffer must be no less then the expected measured voltage.   

The schematics can be found in the git repository. Here is a screenshot:

Analog front-end for the voltmeter (1/3)

Analog front-end of the voltmeter should provide the following functionality and properties:

• Over-voltage protection.
• Voltage range selection (manual or automatic).
• Handling the negative voltage if the ADC analog inputs accept only positive voltage.
• High input resistance.
• Low thermal EMF connection to the test leads when low voltage levels are measured. 

All electronic components for the analog front end should be carefully selected to avoid performance degradation of the ADC parameters like the noise and non-linearity.

Over-voltage protection

I was able to find two ways for over-voltage protection design:

• Using Schottky diodes: When the input voltage (the green line in the simulation) is above the positive power supply voltage (V+), the Schottky diode connected to the V+ is opening and it's forward current (the red line in the simulation) is limited from the protection resistor. In result the output voltage (the blue line in the simulation) will be clamped to value equal to the power supply voltage minus the forward voltage of the Schottky diode. When the input voltage becomes negative, the Schottky diode connected to the negative power supply voltage (V-) will be opening and will limit the negative overvoltage. LTSpice simulation can be found here.

• Using PTC thermistor in series to input and Metal-Oxide-Varistor (MOV) in parallel to the input. The MOV resistance depends on input voltage: when the voltage is above the clamping value, the resistance going low which form a short circuit. The short produce heat in the PTC which increase it's resistance and this opens the circuit and protect the ADC input.

Unfortunately both methods have the following drawbacks when high accuracy voltmeter has to be built:

- Standard Schottky diodes have relative big reverse leakage current, which influence on the op amp voltage offset. The worst thing is that the leakage increases with temperature very quickly, thus output voltage will depends on temperature controlled voltage offset. There are silicon carbide Shottky diodes which resolve this kind of problem, but they are difficult to buy and the forward voltage is greater then the internal ESD diodes. The lowest leakage schottky diode which I found was PADx series from Vishay/Siliconix which are not produced anymore. They have between 1 and 100 pA maximum reverse leakage current. Few replacements exists from the following companies: InterFET (DPADx), Firechild Semiconductor (FJH1101), Central Semiconductor Corp. (BAV45).

- Using PTC and MOV decrease the overall input resistance, because the MOV is connected in parallel to the op amp input and it's resistance is a few MOhms. 

Nice video for general multi-meter protection made David Jones from EEVBlog. It include also current range protection as well.

Fortunately during selection of input op amp, I found LT1167 op amp which can handle up to 100V only with current limit resistor 5K in series to the input. This op amp has nice features: 200/1000 GOhms min/typ input resistance, sub-nA current bias, 1/6 ppm typ/max gain nonlinearity and output offset trimming possibility for calibration.

Automatic Voltage range selection

Most of the ADC have reference voltage below 5 V and a special circuit should be implemented to put the input voltage within the ADC range.
This feature can be easy implemented with a comparator, voltage divider and several relays after the input op amp:

In the shown above LTSpice simulation, the comparator LT1011 have Vref = 1.25V set to the positive input. When the input voltage (the green line in the simulation) reach the Vref, the output of the comparator (the blue line in the simulation) becomes in logical low level and the switches SW1 and SW3 are closing, SW2 is opening. The output voltage (the red line in the simulation) will be connected in the middle point of the voltage divider. In result the output voltage never goes above the Vref limit. The output from the comparator must be read out from the micro controler in order to multiply the measured voltage from the ADC with the voltage divider ratio.  

When input signal is bipolar, window comparator should be used as this is shown in the following simulation: