Sunday, October 23, 2016

Initial schematics for low accuracy voltmeter prototype PCB is ready

The initial schematics for the first PCB prototype is done. 
It can be found in the git opendcm repository:

The changes from breadboard prototype are related mostly to increased over-voltage protection. The voltage supply of the input buffer LTC2057HV was increased to ± 30V, which will protect up to ± 40V with 1K resistor in series. Because the automatic voltage range switch ADG5419 is rated maximum to ± 22V, additional 1K resistor in series was added to the 20V range op-amp buffer LTC2057HV powered by ± 22V. By this way if input voltage is increased to ± 40V, the input voltage of the ADG5419 switch will be limited to ±22V by the power supply of the LTC2057HV buffer on the pin 8.


There are no changes in the ADC section at all:

 The power supply and reference section:
The power supply will be more complicated as I though in the beginning. It should provide 7 positive and negative voltages. I'm not sure now if an AC with isolated transformer or step-up dc-dc converter from battery will be used as main power supply. The current consumption which I measured only on analog part, except the uController, was ~15mA, which is suitable for battery powered supply.

The next thing which I have to experiment is the connection between the ohm-meter and the voltmeter input.

The final multi-meter prototype will contain 3 PCB - one for the voltmeter and the ohm-meter, second for the current meter and the third for the power supply.  

Saturday, October 8, 2016

Preliminary accuracy estimation for the voltmeter

It is time to make preliminary accuracy calculation before making the first PCB prototype.
Initially I had target of 100ppm year accuracy for the low accuracy version with off-the-shelf ADC and 20ppm for multi-slope ADC version. Lets see if selected components will fit into the sub 100ppm target.
The relative accuracy of the voltmeter is given as +/- percent of reading plus percent of the range. The reading corresponds to the gain error of the voltmeter and the range is related to the offset error. Because the voltmeter contain several components, the worst case error is the sum of all errors from each component, but if errors are uncorrelated, root sum square method can give more accurate estimation.
I will try to estimate the accuracy for one year period and for 10 °C temperature range between 18 and 28 °C.
The picture below shows all components contributing to the accuracy errors of the voltmeter:


The accuracy estimation is shown in the table below. I used the worst maximum values extracted from the datasheets of the components.
The accuracy of the LTC2057 op-amp is calculated twice : as input buffer and as buffer in front of the SPDT switch. The accuracy of the voltage divider resistors LT5400 is only calculated for the 20V range, because it is used only for this range. The gain error of the op-amps are calculated based on the open loop gain value. The gain error of the ADC is calculated when the offset is subtracted from the Full Scale Error (FSE).

2V Range20V Range
Gain error, ppmOffset error, ppmGain error, ppmOffset error, ppm
Offset
2.50
0.25
Offset drift temp.0.130.01
Gain0.180.18
Offset
2.50
0.25
Offset drift temp.0.130.01
Gain0.180.18
Temp drift0.00
10.00
Long term year0.002.00
Offset
7.50
0.75
Offset drift year6.000.60
Offset drift temp.3.000.30
Gain3.333.33
INL
5.005.00
Offset2.500.25
Offset drift temp.0.100.01
Gain (FSE-Offset)8.00
8.00
Gain drift temp.1.921.92
Temp drift20.00
20.00
Long term year20.0020.00
2V Range20V Range
AccuracyReading, ppmRange, ppmReading, ppmRange, ppm
Using worst case method53.6129.3565.617.44
Using root sum square method29.6512.0431.355.12

Using the worst case method, I got ~83ppm for full-scale measurement for the 2V range and ~73ppm for the 20V range.
Using the root sum square method, I got ~42ppm for full-scale measurement for the 2V range and ~36ppm for the 20V range.

The actual accuracy can be reduced even more with the software calibration for the gain and the offset and only temperature drift and long term gain and offset errors will remain. 

Looking into the table data, the voltage reference will contribute the most for the gain error and the ADC buffer for the offset error, except for the 20V range, where the ADC INL is dominant.

Of course, the final accuracy shall be measured after one year usage of the voltmeter using a laboratory grade voltmeter or with voltage standard. 

Sunday, September 18, 2016

Preliminary price estimation for the voltmeter's analog front end

Here is a preliminary price estimation for the analog front end of the digital voltmeter.
The BOM includes only the most expensive and important parts, but not :
- The micro controller. 
- The power supply.
- Mechanical parts like banana terminals or case. 
- Passive components except the matched resistors for the voltage divider.

The price are for single quantities, without taxes and shipping taken from www.digikey.com site.

Component nameDescriptionpcsPrice, USD
LTC2057HVIMSInput, switch and comparator op-amps420
LT5400BCMS8E-8Quad matched resistors17.46
ADG5419BRMZAnalog switch14.7
MAX990Comparator for the auto voltage range11.62
MCP1501-20Comparator Vref 2.048V10.78
MCP6062Dual opamp for comparator Vref10.82
LT1001ACN8ADC buffer16.53
LTC2440CGN24 bit ADC111.18
LTC6655BHLS8Voltage reference 5V114.92
74HC4053PW3x SPDT10.41
MMBT3904NPN transistors30.48
Total price, without tax and shipping68.9

Additional cost should be added for the PCB. If all components can fit in the 50mm x 50mm PCB, it will cost ~10-12 USD for 4 layer PCB with ENIG finish.

Tuesday, September 6, 2016

Final breadboard tests

I connected all small breadboards for the final tests and got big mess of wires:


The noise when inputs of the LTC2057 are shorted was in the 10-12uV p-p range which is ok if take in consideration the used voltage reference specs and the buffered op-amps (LTC2052) in the auto-range breadboard.

Unfortunately during the noise tests, I saw a voltage drift which is not acceptable. It is always positive and can reach 1-2 mV in period of 30-60 min:


For now I suspect the front end LTC2057 op-amp, because if I connect the voltage source direct to ADC driver or ADC itself, I do not get such drift. So I have to try one or more op-amps to resolve this issue.

Update:
I used 1.5 AAA battery when I saw the voltage drift. I measured with a Keithley 2002 and got similar drift again, so it is not from the LTC2057, but from the battery. I do not have yet explanation for this fact.

Thursday, September 1, 2016

Breadboarding automatic voltage range

The proof of concept automatic voltage range is ready and it is working as expected.

The automatic voltage range is based on voltage divider, window comparator and single-pole, dual-throw (SPDT) switch. The middle point of voltage divider is connected to a window comparator which triggers input signal to the SPDT when the voltage is greater then fixed positive and negative threshold. In result the SPDT switch connects middle point of the voltage divider to the ADC buffer. When the voltage is less then the threshold, SPDT switch connect directly the output of the input buffer to the ADC buffer.

I made a breadboard with the following components:
  • Input buffer LTC2057.
  • Voltage divider with LT5400-3 (quad matched resistor network). This is the 100K/10K variant, but the final should be 9K/1K (LT5400-8) for 1:10 ratio and lower resistor noise.
  • MAX990 as window comparator. 
  • ADG5419 SPDT switch. Here I used IC solution, but pair of P and N-channel MOSFET can be used too for cost reduction. 
  • MCP1501 voltage reference 2.048V with MCP6061T for reference negative voltage.  The voltage reference was divided with the spare resistors from the LT5400-3 which is the stable voltage threshold +/- 0.2048V for the window comparator.  
  • LTC2052 : 2 additional op-amp buffers for input of the SPDT switch, one for the window comparator input and one for buffering the input of the negative voltage threshold.  
When the input voltage is less than 2.048V and greater than -2.048V, the comparator output is in a low logical level and the SPDT switch connects direct the LTC2057 to the ADC buffer. When the input voltage is greater than 2.048V or less than -2.048V, the comparator output is in high logical level and the SPDT switch connect the middle point of the voltage divider to the ADC buffer.

To use low cost, low voltage window comparators, the middle point of the voltage divider is connected to comparators. In this case the second pair of LT5400 resistors are used for decreasing the comparator's voltage reference.

The reference voltage of 2.048 was selected, because the SPDT switch needs time to switches between input buffer and voltage divider. If this time is too long, the ADC buffer and ADC inputs can be damaged by input voltage if power supply of the buffer is less then the input voltage. The maximum input voltage of the LTC2440 ADC is now 2.5V with the dual supply schematics. The rising slew rate of the LTC2057 is typically 1.3V/uS, which means that maximum time for switching should be no more then 0.347uS [(2.5-2.048)/1.3].

Picture of the breadboard and the power supply is shown below. This is the most density breadboard which I had ever made. From left to the right are placed : LTC2057, LT5400-3, ADG5419, MAX990, MCP1501 and MCP6061T. There was no space left for the ADC input buffer (LT1001A) so I have to place it in the ADC breadboard later.


The picture above is before to place additional op-amp buffers for the SPDT switch and for the comparator. The reasons behind this I found during testing functionallity of the schematics:
- If one of the switch is switched off, there is a float voltage which influence the input of the voltage comparator. In result when the higher or lower voltage than the comparator threshold is applied, the switch does not switches at all.
- During the noise test I found that input of the MAX990 comparators are too noisy, so adding one more low noise op-amp in front of the comparators resolved the issue. 
I used the LTC2052 quad op-amps which I had in stock from the ohmmeter schematics. Note that the maximum supply voltage for the op-amp connected directly after input buffer must be no less then the expected measured voltage.   

The schematics can be found in the git repository. Here is a screenshot:

Sunday, August 28, 2016

Breadboarding LTC2440 level shifting with dual supply

I finished this variant of level shifting and I got successful result. I had doubts about noise levels due fact that the voltage reference use ground which is the -2.5V output from the linear regulator. But the measured noise when the ADC inputs are shortcut to GND shows noise level less than noise specified in the voltage reference datasheet.

I used low cost +5V ADR395 voltage reference from Analog Devices for the breadboarding because I had only +2.5V version of the LTC6655. The noise level of this voltage reference is 8uV p-p according the datasheet, but when I short inputs of the ADC, I got less then 1uVp-p noise. 

The ADC LTC2440 can measure now +/- 2.5V on the input. The picture below shows my setup with power supply module made with cheap LDOs. This supply gives +/- 2.5V, +/- 5V and GND to rest of the breadboards. 
The breadboard at bottom contain the ADR395 and the LTC2440 IC. 
The breadboard in the middle contain the level translator for outputs and inputs from the ADC to the uController. The outputs from the ADC are level translated with bipolar transistor MMBT3904 as this is shown in the LTC2442 datasheet page 32. The inputs for ADC are level translated with 74HC4053 which is triple single-pole double-throw analog switch.
In the bottom right corner is shown the Cutecom application which trace measured results from Pro Micro Arduino board. 


Measuring negative voltage less then -0.3V (I tried with AA battery) which is the maximum allowed from the LTC2440 datasheet does not cause malfunction of the ADC.

The schematics is shown below and can be found in opendcm git repository in the following link. This schematics was made with the LTC6655 voltage reference, because I was too lazy to make new component for the ADR395.  


Next step is to implement the automatic voltage range on the breadboard and to connect it to the ADC. I already received all parts and hope that next week will have enough time to finish it. This is the final step before start working on the first PCB prototype.

Monday, July 25, 2016

Breadboarding the analog front end is in progress...

Initially I though to use LTC1167 and level shifting schematics for the breadboarding prototype, but unfortunately the following reasons stop me from this decision:
- The complex schematics of the level shifting and the input offset of LTC1167 increase significant the total price.
- When the op-amp input is touched by the finger during measurement, the output voltage level is decreasing with several hundred mV. I do not know what is the reason, but I was unpleasantly surprised from this fact. This means that I can not use this op-amp as front-end for sure. 
- The noise (DC to 10Hz) of LTC1167 is 1.5 uV peak to peak, which is less then my target of 6.5 digits of resolution for the 2.5V peak to peak range (-1.25V to +1.25). 

So, I changed my mind in the following direction:
- Instead to use level shifting, I will try with setting negative voltage on the ADC's ground pin (-2.5V) and level shifting the digital output pins as this is shown in the LTC2442 ADC datasheet. This will give me full 5V peak to peak range (-2.5V to +2.5V) and maximum 1.56uV noise for reaching 6.5 digits of resolution. 
- Instead LTC1167 op-amp, I will tried the LTC2057 which does not change output voltage level when fingers touch the op-amp input pins and have the following properties:

  • 0.2 uV p-p typical value for DC-10Hz noise.
  • 5uV maximum input offset voltage (0.5uV typical) for +/-30V supply.
  • 0.025 Î¼V/°C input offset voltage drift against temperature.
  • Low input current bias - 200pA max (30pA typical) for 25°C.

Most of the parts are already ordered and next blog post will contain the result of breadboarding.

Monday, June 13, 2016

Analog front-end for the voltmeter (3/3)

In the last part for the analog front-end I tried to make all in one simulation for my first prototype:


The voltage offset of the LT1167 input op amp is automatically trimmed with 3 additional op amps. The first one is used for an input buffer, the second one subtract output voltage from the input one and the third one is used as buffer to the VRef pin of the LT1167 which requires low resistance. Simulation results shows that a small resistor (R6) must be put in serial to R5 in order to minimize the offset.

The next stage is the automatic voltage range. One SPDT relay can be used to switch between the middle point of the voltage divider (1:10 ratio, range from 1.25 to 12V) or directly from the LT1167 output (1:1 ratio, range from 0-1.25V). The window comparator for triggering the voltage range switch is realized with 2xLT1011 comparators and uses 2 voltage references : +/- 1.25V. In the simulation is not used hysteresis settings for the comparators, but special attention should be taken for accurate switching.

The last stage is the level shifting. The input signal is shifted by 0.625V, taken after the 1:2 divider from Vref source. The output of the stage have additional 1:2 voltage divider. 
All resistors will be from LT5400 quad matches series, which have matched long term drift of 2ppm. 

Here are examples for calculation of unknown input voltage when the output voltage is read out from the ADC using the simulation results:

Vin = (Vshift - Vout) * 2 when voltage range is 0-1.25V and input signal is positive:

Vout = 0.62499988 V 
Calculated Vin = 0.0000024V
Simulation Vin = 0V, error is 2.4 ppm

Vout = 0.12500075V
Calculated Vin = 0.9999985V
Simulation Vin = 1V, error is 1.5 ppm

Vin = (Vshift - Vout) * 10* 2 when voltage range is 1.25-12.0V and input signal is positive:

Vout = 0.024990104V
Calculated Vin = 12.00019792V
Simulation Vin = 12V, error is 16.49 ppm


Vin = -(Vout - Vshift) * 2 when voltage range is 0-1.25V and input signal is negative:

Vout = 1.124999 V 
Calculated Vin = -0.999998V
Simulation Vin = -1V, error is 2 ppm

Vin = -(Vout - Vshift) * 10 * 2 when voltage range is 1.25-12V and input signal is negative:

Vout = 1.2250097 V 
Calculated Vin = -12.000194V
Simulation Vin = -12V, error is 16.16 ppm

When the Vout is less then the Vshift, the input voltage is positive and when Vout is greater then Vshift, the input voltage is negative.

Saturday, June 11, 2016

Analog front-end for the voltmeter (2/3)

Handling the negative voltage

If multi-slope integrated ADC or ADC with true differential input are used in a voltmeter, there is no need for a special handling of the negative voltage.
However most of the ADC on the market supports only positive voltage input and have uni-polar power supply. In this case the analog front end should convert the negative voltage input to positive or to limit it to the minimum allowed voltage (usually limited by ESD protection diodes in the ADC to several hundred mV below the ground).

I spent a lot of research time for this part of design and found the following approaches:

  • Full- or half-wave rectification of the input bipolar signal.
  • Switching between none inverting op amp when signal is positive and inverting op amp when signal is negative, using comparator and relays.
  • Setting negative voltage on the ADC's ground pin and level shifting the digital output pins. This approach can be seen in the LTC2442 datasheet, page 27/28 and can be used also for LTC 2440 according LT tech support.
  • Level shifting of the input signal.
  • Bipolar single ended to differential conversion.
The half-wave rectification is based on the over voltage protection schematics and it is the most cost effective variant. LTSpice simulation can be found here.


The current limiting resistor should be selected in this way that voltage across the Schottky diode should not exceed maximum allowed input voltage for the ADC. In this example this is -0.3V. The drawback of this solution is that the voltmeter will detect the negative voltage, but will not able to measure it.

An example for the full-wave rectification can be found in the LT1001 datasheet, on bottom of the page 9, where schematics of "Precision Absolute Value Circuit" is shown. LTSpice simulation can be found here.


This schematics have the following drawbacks:
- Requires 5 matched resistors. This is costly and very hard to achieved.
- Requires 2 op amp in the signal path. This will increase the noise.
- In the mV range, distortion of the signal can be seen in the simulation:

The second option relies on swapping input signal between two op amps using relays. LTSpice simulation can be found here.


This schematics have the same output like the full-wave rectification, but required only 2 matched resistors (LT5400-1) and 2 SPDT relays. When the input voltage is below the ground, the comparator will close relays for inverting op amp and will open those for none inverting op amp.

The next approach is the level shifting of the input signal. LTSpice simulation can be found here.


This method shift the input voltage using half of the reference ADC voltage.
The schematics use one op amp for the shifting, one for Vref buffering and 2 quad LT5400 matched resistors.



















The input signal is inverted by the first op amp and level shifted from the positive input from buffered ADC voltage divided by 2. The output voltage is additionally divided by 2: from 2.5V peak to peak to 1.25V peak to peak and the lowest voltage is 0V.

The last method is single to differential conversion. This can be done with specialized op amp with differential outputs or with discrete op-amps.

If the ADC have to be buffered, information can be found in the comprehensive application note named "Buffer Op Amp to ADC Circuit Collection" from the Texas Instruments company. Also good source of information can be found in the Analog Devices's "The Data Conversion Handbook", chapter 6, Interfacing to Data Converters.


Analog front-end for the voltmeter (1/3)

Analog front-end of the voltmeter should provide the following functionality and properties:
  • Over-voltage protection.
  • Voltage range selection (manual or automatic).
  • Handling the negative voltage if the ADC analog inputs accept only positive voltage.
  • High input resistance.
  • Low thermal EMF connection to the test leads when low voltage levels are measured. 
All electronic components for the analog front end should be carefully selected to avoid performance degradation of the ADC parameters like the noise and non-linearity.

Over-voltage protection

I was able to find two ways for over-voltage protection design:
  • Using Schottky diodes: When the input voltage (the green line in the simulation) is above the positive power supply voltage (V+), the Schottky diode connected to the V+ is opening and it's forward current (the red line in the simulation) is limited from the protection resistor. In result the output voltage (the blue line in the simulation) will be clamped to value equal to the power supply voltage minus the forward voltage of the Schottky diode. When the input voltage becomes negative, the Schottky diode connected to the negative power supply voltage (V-) will be opening and will limit the negative overvoltage. LTSpice simulation can be found here.

  • Using PTC thermistor in series to input and Metal-Oxide-Varistor (MOV) in parallel to the input. The MOV resistance depends on input voltage: when the voltage is above the clamping value, the resistance going low which form a short circuit. The short produce heat in the PTC which increase it's resistance and this opens the circuit and protect the ADC input.

Unfortunately both methods have the following drawbacks when high accuracy voltmeter has to be built:
- Standard Schottky diodes have relative big reverse leakage current, which influence on the op amp voltage offset. The worst thing is that the leakage increases with temperature very quickly, thus output voltage will depends on temperature controlled voltage offset. There are silicon carbide Shottky diodes which resolve this kind of problem, but they are difficult to buy and the forward voltage is greater then the internal ESD diodes. The lowest leakage schottky diode which I found was PADx series from Vishay/Siliconix which are not produced anymore. They have between 1 and 100 pA maximum reverse leakage current. Few replacements exists from the following companies: InterFET (DPADx), Firechild Semiconductor (FJH1101), Central Semiconductor Corp. (BAV45).

- Using PTC and MOV decrease the overall input resistance, because the MOV is connected in parallel to the op amp input and it's resistance is a few MOhms. 

Nice video for general multi-meter protection made David Jones from EEVBlog. It include also current range protection as well.

Fortunately during selection of input op amp, I found LT1167 op amp which can handle up to 100V only with current limit resistor 5K in series to the input. This op amp has nice features: 200/1000 GOhms min/typ input resistance, sub-nA current bias, 1/6 ppm typ/max gain nonlinearity and output offset trimming possibility for calibration.

Automatic Voltage range selection

Most of the ADC have reference voltage below 5 V and a special circuit should be implemented to put the input voltage within the ADC range.
This feature can be easy implemented with a comparator, voltage divider and several relays after the input op amp:


In the shown above LTSpice simulation, the comparator LT1011 have Vref = 1.25V set to the positive input. When the input voltage (the green line in the simulation) reach the Vref, the output of the comparator (the blue line in the simulation) becomes in logical low level and the switches SW1 and SW3 are closing, SW2 is opening. The output voltage (the red line in the simulation) will be connected in the middle point of the voltage divider. In result the output voltage never goes above the Vref limit. The output from the comparator must be read out from the micro controler in order to multiply the measured voltage from the ADC with the voltage divider ratio.  

When input signal is bipolar, window comparator should be used as this is shown in the following simulation:

Sunday, April 10, 2016

Decreasing noise in the breadboard

Last days I tried to reduce noise levels in the ohmmeter and I can say that I got much better results than expected. Now the noise is between 2 and 3 uV peak to peak for period of 8.5 hours, instead 19 uV before the changes:



The drift which is visible on the chart is probably due the temperature changes last night. However, most of the noise was about 2uV and there were some spikes to up 3uV. Which is very close to the dominant peak to peak noise from datasheet of the LTC2052 op-amp buffer (1.5 uV). If I calculate the worst case peak to peak noise, it will be 2.69 uV : ADC 0.565 uV+ LTC2052 1.5 uV + LTC6655-2.5 0.625 uV.

The changes which I made to get these low noise levels are:
- Using separate supply for the uController. Before I used one shared USB power supply for both ADC and the uController. This change gave the biggest drop in the noise.
- Using a low noise LDO to supply the LTC2052 buffer of the ADC. This change gives additional 1-2 uV noise drop.
- Adding bypass capacitors for each IC on the breadboard.


Wednesday, April 6, 2016

Breadboarding the Ohmmeter

*Update 4 June 2019 : Last few days I was busy with a digital thermometer based on ADS1220 and there I found better way to make resistance measurements. Actually this approach is used in bench-top multimeters. Instead using long-term stable voltage reference and resistor to generate exact current value, it is better to use low noise current source which pass through both a resistor under test and a reference resistor. In this case the reference resistor is connected to the voltage reference inputs of the ADC. In result the ADC will show ratio between the resistor under test and the reference resistor. 
*End of the update

I tried to make an ohmmeter, based on the current source schematics found in the Linear technology LTC6081/LTC6082 datasheet, page 14. The other option was to use the Howland current source, but I will try this later.

The KiCad schematic is uploaded into the git repository, together with the LTSpice simulation:


I played with the simulator and found that measured resistor can have higher value then the reference, but the power supply voltage should be increased and eventually additional voltage divider can be put between the voltage reference and the first op-amp as it is shown in the LT schematics. This will allow measuring of resistance from hundreds mOhms to several MOhms only with 2 reference resistors : 1K and 100K, thus decreasing the final cost. An attention should be paid for the PCB layout for guarding the leakage current.

Using the LTC2052 op-amps, the current source was implemented on the breadboard with 10KOhm reference resistor (Vishay S102 series) and nominal 10Ohm resistor for measurement (9.92 Ohm measured with Keithley 2002), 2.5V reference voltage and 100KOhm LTC5400 quad matched resistor network.

The noise was ~19 uV peak to peak for duration of ~7h:40m.
The data in the Y axis are the ADC measurements in microvolts, data in the X axis are the sample counts. The ADC was set in low noise mode with ~6.9 samples per seconds.



I expect to have much lower noise when the first PCB prototype will be tested. After voltmeter calibration, I have to compare the results with the reference DMM.

Monday, April 4, 2016

GitHub repository and preliminary noise test

GitHub repository was created for the opendcm project: https://github.com/opendcm/opendcm
I uploaded :
- The KiCad project with schematic used by my breadboard
- Arduino sketch with code for reading ADC measurement and sending to PC through RS232.

I made some preliminary noise tests with the breadboard. The data shows that noise level is ~9uV peak to peak under the following conditions:
- The breadboard was put in a box with silica gel package for ~ 2h:20m
- The LTC2052 op-amp was set as buffer in front of ADC input with voltage resistor divider 1.2M : 120K connected to the Vref 2.5V.


The data in the Y axis are the ADC measurements in microvolts, data in the X axis are the sample counts. The ADC was set in low noise mode with ~6.9 samples per seconds.