Current measurement : Schematics, breadboaring and test results (Part 3)

I started current measurement testing based on Microchip application note 1332 named "Current Sensing Circuit Concepts and Fundamentals". In this document are described in details all advantages and disadvantages for the current sense schematics. Another source for schematics can be found in the site eetimes.com. It shows current sense schematics using simple op-amp, difference amplifier, instrumentation amplifier and current shunt monitors. 

Finally I decided to make first breadboarding with instrumentation amplifier schematics:

This schematics have the following advantages:

- Can be used in both low and high side current measurements.

- No resistive loading effect.

- High Common mode rejection ratio. 

- Possibility to decrease offset error with applying small voltage in the reference pin after the R7 resistor. 

The disadvantages are:

- Decreased common voltage range, limited to voltage supply of the used operational amplifiers and the input sense voltage drop over the current shunt. But if high voltage op-amps are used like LTC2057 (+/-30V) this is not a problem at all.

- Higher cost due usage of 3 op amps and matched resistors.

I started breadboard testing with 3xLTC2057 and matched resistor networks LT5400 9K/1K and 100K/100K (10K is better for low noise, but I did not had at the time of the tests):

The gain 10 of the instrumentation amplifier was implemented in the first high impedance buffers using LT5400-8 9K/1K resistors. The formula for the gain is 1+2*Rf/Rg. The Rg resistor is 2K, connected in serial 2x1K resistor. 

The reference pin was connected to GND. This cause ~ 20-30 uV offset error on floating inputs. Using Keithley 2000 DMM relative function, offset was zeroing as much as possible, but there was noise in the 1-2uV range.

As voltage reference I took the 5V ADR395 5V which was used in my post for testing bipolar input with LTC2440 level shifting. For generation of the reference currents, I used several Vishay resistors with low temperature coefficients. The values were 1K, 2.5K, 5K, 10K, 100K which I used in combination to generate from 5mA to 1.66uA reference current. I was not able to test with more than 5 mA, because of current limit of the ADR395 reference.

I put a small flexible cover over the chips to avoid air flow which can cause significant errors in uA range:

I bought 0.1 Ohms Multicom model MC14715 resistor (~100ppm TCR) which was with 2 terminals only. I soldered two additional copper wires near to the lead exit to decrease measurement error:

Without these 2 additional terminal, I got about 2 times bigger error.

I used Keithley 2000 DMM for the measurement with the internal 1024 samples buffer with slow rate (10 NPLC) and offset reset using the relative function.  There are some statistic information which can be obtained from the buffer like mean value, standard deviation, min and max value.

The results are the following:

- About 200 ppm error in the mA range when compare with the calculated current value. The mean value from the DMM buffer was used. I think that this is an op-amp offset error and can be calibrated easy.

- About 500-1000 ppm error in the uA range when compare with the calculated current value. The mean value from the DMM buffer was used. I think increased error is due not real 4 sense terminal of the shunt.

- Stable 10uA resolution, but I can not get stable 1uA resolution due the noise. Noise level was between 3 and 6 uV. Here I expected less than 3uV noise due ~1uV noise from the DMM and gain 10 * 0.2uV LF noise of the LTC2057 and ~ 1uV from the 100K resistor in the difference op-amp stage. I will make later a small prototype PCB to check if this noise is coming from the breadboard. One possible modification is to use gain 1, but at the end of the instrumentation amplifier to use low noise level op amps with gain 10 like LT6018, LT1028, LT1007.

- Standard deviation was between 590 and 680 nV.