One of the last things, which I have to find out, is the way of switching between different DMM's measurements : voltage, current and resistance.
In the handheld digital multi-meters, a mechanical rotary selector is used.
In the bench-top DMM, modes are switching electronically with push buttons or with remote interfaces like GPIB/RS-232/USB. This kind of switching requires electromechanical or transistor based relays.
My choice is relays based switching only because of the remote control.
In the bench-top DMM, modes are switching electronically with push buttons or with remote interfaces like GPIB/RS-232/USB. This kind of switching requires electromechanical or transistor based relays.
My choice is relays based switching only because of the remote control.
The electromechanical relays have very simple control, low resistance, slow switching times (millisecond range), limited mechanical life and suffer from thermal EMF effect due different materials used. Of course there are low thermal EMF reed relays like Pickering series 100 with <1 uV and Coto series 3500/3600 with 0.5-10 uV. Unfortunately the low thermal EMF reed relays are expensive and some of them can be purchased only from the manufacturer.
The transistor based relays (JFET/MOSFET/BJT) are very fast (nanoseconds range), needs more complex control, have low thermal EMF, they are cheap and can be purchased from electronics distributors.
Here I selected the JFET based switch because of the lowest noise and the low EMF among the other possibilities.
Of course there are some drawback when JFET transistors are used:
- Voltage offset error due reverse gate-source leakage (Igss). Additionally this parameter is temperature sensitive: roughly doubling every 10°C.
- Glitches (signal transients) during switch on/off due charge injection.
- Normally closed (the switch is turn on by default).
- Control logic is more complex.
Igss is the most important parameter when JFET switch is used for mode selection. When the switch is closed, the value of the Igss multiplied by the input resistance of the circuit under the measurement, will generate voltage error offset. For example, if the Igss is 1pA and circuit resistance is 1MOhms, the voltage offset of 1uV will be generated.
During JFET search, I found one interesting document from TI for op amp over voltage protection, using JFET as diode (drain and source connected). Later I tried on the breadboard and it was working fine. So, now I think to use this approach for protection of the first op amp, which make unnecessary the +/- 30 V power supply in my post about the initial schematics for the low accuracy voltmeter.
So, back to schematic. Using JFET transistor as switch, needs some extra components when the TTL compatible control logic is used. The N-channel JFET transistor is open (turn off) when the negative voltage applied between Gate and Source is greater than Vgs(off) parameter value of the transistor and more negative than the input signal voltage level. In the case of MMBF4117, the Vgs(off) parameter have maximum value of -1.8V.
The control logic (micro-controller/CPLD/FPGA) usually use TTL levels, so it is better to use analog comparator to drive the JFET transistor. The positive Vcc can be set to 20V and negative should be greater than expected input voltage. In my case this will be -20V. The maximum output current of the comparator must not exceed maximum value of the JFET's forward gate current.
The final picture of DMM mode selection is shown below. The ohm meter schematics is based on the Linear technology's LTC6081/LTC6082 datasheet, page 14. The following switches are used in the resistance measurement:
- switch "SW VRef" for extending Ohm-meter ranges, when high resistance is measured using 10 times smaller voltage reference.
- switch "SW FB4W" will be used in 4 wire resistance measurement. In this mode reference resistor "Rref 4W" with value 1K will be used.
- switches "SW FB2W" and "SW 2W" will be used in 2 wire resistance measurement. In this mode reference resistor "Rref 2W" with value 100K will be used.
Calibration of the resistance measurement will be external for low accuracy and internal for high accuracy version of the DMM. I will use the Vishay H series (VHP202) resistors as secondary resistance standard. According datasheet, the shelf life is 2ppm for 6 years and maximum TCR is 2.5ppm/°C
When voltage is measured, all switches will be switched off and the "SW VM" will be switched on.
When current is measured, all switches will be switched off and the "SW CM" will be switched on.
The status of every JFET switch when particular measurement is performed is given below:
- Voltage offset error due reverse gate-source leakage (Igss). Additionally this parameter is temperature sensitive: roughly doubling every 10°C.
- Glitches (signal transients) during switch on/off due charge injection.
- Normally closed (the switch is turn on by default).
- Control logic is more complex.
Igss is the most important parameter when JFET switch is used for mode selection. When the switch is closed, the value of the Igss multiplied by the input resistance of the circuit under the measurement, will generate voltage error offset. For example, if the Igss is 1pA and circuit resistance is 1MOhms, the voltage offset of 1uV will be generated.
There are not too much JFET transistors, which have Igss in the pA range. Vishay company produced before 2017 the 2N4117A with maximum Igss value of 1pA and typical value of 0.2pA for 25°C. The price was between 4 and 9 USD. The next best transistor, which is currently available on the market, is the MMBF4117 (N-channel) made by On Semiconductor with maximum 10pA Igss for 25°C and price below 0.5 USD.
During JFET search, I found one interesting document from TI for op amp over voltage protection, using JFET as diode (drain and source connected). Later I tried on the breadboard and it was working fine. So, now I think to use this approach for protection of the first op amp, which make unnecessary the +/- 30 V power supply in my post about the initial schematics for the low accuracy voltmeter.
So, back to schematic. Using JFET transistor as switch, needs some extra components when the TTL compatible control logic is used. The N-channel JFET transistor is open (turn off) when the negative voltage applied between Gate and Source is greater than Vgs(off) parameter value of the transistor and more negative than the input signal voltage level. In the case of MMBF4117, the Vgs(off) parameter have maximum value of -1.8V.
The control logic (micro-controller/CPLD/FPGA) usually use TTL levels, so it is better to use analog comparator to drive the JFET transistor. The positive Vcc can be set to 20V and negative should be greater than expected input voltage. In my case this will be -20V. The maximum output current of the comparator must not exceed maximum value of the JFET's forward gate current.
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| JFET SPST switch |
The final picture of DMM mode selection is shown below. The ohm meter schematics is based on the Linear technology's LTC6081/LTC6082 datasheet, page 14. The following switches are used in the resistance measurement:
- switch "SW VRef" for extending Ohm-meter ranges, when high resistance is measured using 10 times smaller voltage reference.
- switch "SW FB4W" will be used in 4 wire resistance measurement. In this mode reference resistor "Rref 4W" with value 1K will be used.
- switches "SW FB2W" and "SW 2W" will be used in 2 wire resistance measurement. In this mode reference resistor "Rref 2W" with value 100K will be used.
Calibration of the resistance measurement will be external for low accuracy and internal for high accuracy version of the DMM. I will use the Vishay H series (VHP202) resistors as secondary resistance standard. According datasheet, the shelf life is 2ppm for 6 years and maximum TCR is 2.5ppm/°C
When voltage is measured, all switches will be switched off and the "SW VM" will be switched on.
When current is measured, all switches will be switched off and the "SW CM" will be switched on.
The switches "SW VM" and "SW CM" are placed after the input buffer to decrease the leakage of the JFET in the front of the input buffer. The output of the buffer is low resistance and the error due these 2 switches can be ignored.
The total leakage in the 2W/V binding post (BP), before the input buffer, will be sum of Igss of the "SW 2W", over voltage protection JFETs and the Ibias of the input buffer. Using MMBF4117 and LTC2057, this means maximum ~ 3*10pA + 200pA = 230pA for 25°C. For comparison the high end DMM like Keithley has <100pA leakage by specification.
It is hard to find low noise, low Ibias, zero-drift and high-voltage op-amp. One alternative is using the LTC1050/1052, which have 30pA maximum Ibias, 0.5/1.5uV LF noise at 1Hz/10Hz and maximum 5uV Vos. The only problem is the low supply voltage of 18V. This can be resolved using bootstrapping technique described in the www.edn.com site.
The status of every JFET switch when particular measurement is performed is given below:
Update 2 May 2018 : Added a diode between the comparator output and the Gate of the JFET switch. The reason is described at the end of the part 2.
Update 5 June 2019 : I found better way to measure resistance using stable reference resistor and stable, but not precise current source. The current source is applied across the reference resistor and goes through the resistor under test. The voltage drop over the reference resistor will be used as reference voltage of the ADC. By this way the resistance is measured as ration between the resistor under test and the reference resistor. The only thing which I have to realize is switching between the LTC6655 and the reference resistor in front of the LTC2440. This idea I got during making the digital thermometer using ADS1220 IC..
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