Current measurement : Schematics, breadboaring and test results (Part 3)

I started current measurement testing based on Microchip application note 1332 named "Current Sensing Circuit Concepts and Fundamentals". In this document are described in details all advantages and disadvantages for the current sense schematics. Another source for schematics can be found in the site eetimes.com. It shows current sense schematics using simple op-amp, difference amplifier, instrumentation amplifier and current shunt monitors. 

Finally I decided to make first breadboarding with instrumentation amplifier schematics:

This schematics have the following advantages:

- Can be used in both low and high side current measurements.

- No resistive loading effect.

- High Common mode rejection ratio. 

- Possibility to decrease offset error with applying small voltage in the reference pin after the R7 resistor. 

The disadvantages are:

- Decreased common voltage range, limited to voltage supply of the used operational amplifiers and the input sense voltage drop over the current shunt. But if high voltage op-amps are used like LTC2057 (+/-30V) this is not a problem at all.

- Higher cost due usage of 3 op amps and matched resistors.

I started breadboard testing with 3xLTC2057 and matched resistor networks LT5400 9K/1K and 100K/100K (10K is better for low noise, but I did not had at the time of the tests):

The gain 10 of the instrumentation amplifier was implemented in the first high impedance buffers using LT5400-8 9K/1K resistors. The formula for the gain is 1+2*Rf/Rg. The Rg resistor is 2K, connected in serial 2x1K resistor. 

The reference pin was connected to GND. This cause ~ 20-30 uV offset error on floating inputs. Using Keithley 2000 DMM relative function, offset was zeroing as much as possible, but there was noise in the 1-2uV range.

As voltage reference I took the 5V ADR395 5V which was used in my post for testing bipolar input with LTC2440 level shifting. For generation of the reference currents, I used several Vishay resistors with low temperature coefficients. The values were 1K, 2.5K, 5K, 10K, 100K which I used in combination to generate from 5mA to 1.66uA reference current. I was not able to test with more than 5 mA, because of current limit of the ADR395 reference.

I put a small flexible cover over the chips to avoid air flow which can cause significant errors in uA range:

I bought 0.1 Ohms Multicom model MC14715 resistor (~100ppm TCR) which was with 2 terminals only. I soldered two additional copper wires near to the lead exit to decrease measurement error:

Without these 2 additional terminal, I got about 2 times bigger error.

I used Keithley 2000 DMM for the measurement with the internal 1024 samples buffer with slow rate (10 NPLC) and offset reset using the relative function.  There are some statistic information which can be obtained from the buffer like mean value, standard deviation, min and max value.

The results are the following:

- About 200 ppm error in the mA range when compare with the calculated current value. The mean value from the DMM buffer was used. I think that this is an op-amp offset error and can be calibrated easy.

- About 500-1000 ppm error in the uA range when compare with the calculated current value. The mean value from the DMM buffer was used. I think increased error is due not real 4 sense terminal of the shunt.

- Stable 10uA resolution, but I can not get stable 1uA resolution due the noise. Noise level was between 3 and 6 uV. Here I expected less than 3uV noise due ~1uV noise from the DMM and gain 10 * 0.2uV LF noise of the LTC2057 and ~ 1uV from the 100K resistor in the difference op-amp stage. I will make later a small prototype PCB to check if this noise is coming from the breadboard. One possible modification is to use gain 1, but at the end of the instrumentation amplifier to use low noise level op amps with gain 10 like LT6018, LT1028, LT1007.

- Standard deviation was between 590 and 680 nV.

Current measurement : Selection of the current ranges, shunts and fuses (Part 2)

Initially I thought to have 5A (1mA resolution) and 1mA (1uA resolution) ranges with 0.02 mV/mA burden voltage. This is fine for 3.5 digits DMM, but after few months of research and results from testing with the breadboard, I decided to revisit the resolution with better ones. In result, the burden voltage will be increased, but will be not greater then the DMM on the market.

To keep things simple, I decided to make research only for 2 current ranges with 2 separate binding posts. I was not able to find suitable relay with low contact resistance, low leakage and high current which to allow usage of a single binding posts for both ranges. The first range will be from 1uA to 2A (mA/A range) with 0.1 Ohms shunt and the second will be from 1nA to 2 mA (nA/uA range) with 100 Ohms shunt. For the first DMM PCB prototype only the mA/A range will be implemented.

The 0.01 Ohms shunt is ideal for 2A range due low burden voltage, but I choose 0.1 Ohms resistor due the following reasons:
- I was not able to find a very fast acting fuse, which have specified resistance for nominal current less than 0.1 Ohms. If the shunt is less than 0.1 Ohms, the voltage drop will be determined by the fuse instead of the shunt. Most of the fuses, specified the cold resistance when 10% of the nominal current is used.
- This the the minimum value, which can give 1uA resolution with gain 10 amplifier for 6.5 digits voltmeter. If the shunt is 0.01 Ohms, gain of 100 is required to have 1uA resolution, but in this case ultra low noise op amp are required, which will cause bigger bias current and/or input voltage offset.

I found the following available 0.1 Ohms shunt resistors in the market:

Parameters	VCS1625P/Y0856	VCS1625/Y08500	VCS301/2	VCS202/Y0941	VFP-4/Y0734
Maximum load life 2Kh, ppm	250	400	500	500	500
Typical load life 2Kh, ppm	150	200	200	200	N/A
Maximum TCR ppm/°C	20 ppm/°C	20 ppm/°C	3 ppm/°C	N/A	25 ppm/°C
Typical TCR ppm/°C	2 ppm/°C	2 ppm/°C	N/A	15 ppm/°C	2 ppm/°C
Maximum current	5A	5A	15А	15А	3A
Power rating (free air/heatsink)	1W	0.5W	3W/10W	2W	3W/10W
Price	12.5 USD	12.1 USD	36.62 USD	41.75 USD	69.34 USD

All of them are made by Vishay Precision Group and they are available in single quantity from Mouser, Digi-key and Avnet.

Note that sub-ohm shunt resistor must have 4 wire connection to reduce the measurement error with elimination of the lead and contact resistance.

The specified maximum load life (accuracy) is for 2000 hours uninterruptible working at power rating and 25°C or 70°C depends on the model. When the DMM is not used continuous or the measurement current is less than the maximum, these values are several times less. I was not able to find such data for Vishay current sense resistors, but in the datasheet of the PCR series from Riedon is shown that the accuracy can be increased 5 times (from 0.5% to 0.1%) if the current sense is used at 60% from the rated nominal power. So may be it make sense to select a current sense resistor with the maximum power rating and to use it in lower current then the nominal. Also using heat-sink can lower the the resistor's temperature, thus the load life can be improved.

I think that the best price-quality ratio is the VCS1625P series. It will have sub 500 ppm accuracy for one year (5 days/8 hours working condition) when it is used in 10°C temperature window. The maximum current is 5A, which can allow to use high rating fuse with less resistance. The maximum power for the 2A range will be 2*Imax*Rshunt = 2*2*0.1 = 0.4W which is in the range.

The next thing is to select the fuse for mA/A range. I looked for very fast acting, low resistance fuse in the A range. Most of datasheets have values only for the cold resistance (10% of the rated current). Only for EATON Bussmann series I found fuse resistance values when nominal current is applied, which they called: "typical voltage drop measured at 25°C±3°C ambient temperature at rated current". For the 5A maximum current of the VCS1625P shunt, according the Time-Current curve chart, using GBB-2-R model (2A rate current), the fuse will break in 50ms when 5A current is applied. By this way it is guarantee that the shunt will be not overloaded with more than the nominal current value and the shunt accuracy will not exceed the datasheet value. The cold resistance of the GBB-2-R is 0.0662 Ohms, the resistance for nominal current is 0.1687 Ohms. Combined with shunt resistor, the input DMM resistance for current measurement will be 0.16632 Ohms for <0.2A and 0.2687 Ohms for >0.2A and <2A. This does not include the connecting wires, PCB trace and binding post resistances. Probably the final burden voltage will be 0.2 mV/mA for <0.2A and 0.3 mV/mA for > 0.2 A. One alternative is the Littlefuse 459 Pico series 2A model. It will break in 20ms when 5A current is applied. Unfortunately datasheet only specified the cold resistance which is 0.0468 Ohms, which is less than the Bussmann series.

Both EATON (DMM-B) and Littlefuse (FLU) have fuse series for DMM usage, but in the specification files, there is no information about the fuse resistance.

For the uA/nA range I choose 100 Ohms shunt resistor. It will generate 0.1uV voltage drop for the 1nA current, which again should be multiplied by 10 to get 1uV minimum resolution. For this range, the fuse resistance is not so much important, due high value of the shunt resistor. 

Current measurement : The accuracy challenge (Part 1)

The current measurement seemed very easy task for me in the beginning. I thought that measuring voltage over low resistance shunt is piece of cake. Later, I realized that this is not true : it is really a challenge and the market prove it. I found only 4 DMM, which have less than 500 ppm relative accuracy per year in the A/mA/uA range (with one exception : 2A range for Keithley 2002). 

These are: Fluke 8508A, HP/Agilent/Keysight 3458A, Transmille 8081 and Tek/Keithley 2002. In the table below, the accuracy specification for one year is show:

DCI ranges	Relative accuracy to calibration standard, ± (ppm reading + ppm range)
*not all ranges are show	Fluke 8508A (95% confidence)	Transmille 8081	Keysight 3458A	Tek/Keithley 2002
100/200 uA	6.5 + 2	7 + 4	20 + 8	350 + 25
1/2 mA	6.5 + 2	7 + 4	20 + 5	350 + 20
10/20 mA	8 + 2	9 + 4	20 + 5	350 + 20
100/200 mA	33 + 4	30 + 6	35 + 5	375 + 20
1/2 A	170 + 8	150 + 13	110 + 10	750 + 20

According the datasheets, the most accurate current measurement can be done with the Fluke 8508A and Transmille 8081 DMM, following by the Keysight 3458A and Keithley 2002. 

The rest bench-top DMM on the market have accuracy starting from 500 ppm and can finish to 1500+ ppm accuracy for the reading.

The accuracy of the current measurement depends on the:

- Value/stability/TCR of the shunt resistor

- The CMRR/Vos/Vos∆Time/Vos∆Temp/OpenLoopGain/GainError∆Temp of the used operational/instrumental/differential amplifiers in the current measurement schematics.

- Matching resistors tolerance/TCR for the differential operational amplifier.

So a lot of factors contribute to the current measurement accuracy and trade-off has to be made. May be the biggest trade-off is the value of the shunt resistor. For bigger current ranges, the value should be in the sub-ohms range for decreasing the power dispersion. But there are not too much resistors in the sub-ohms range which have let say less than 100ppm per year stability. For example the 0.5 Ohms resistor from Vishay series Y1690 have typical 50ppm load life for 2K hours. However the trade-off is the availability and the price: there is minimum order quantity of 500 pcs, which cost ~7K+ USD. 

If a bigger value of the shunt resistor is selected, the stability and the availability are better, but the trade-off is the parameter which can be critical for some type of circuits under measurement. This parameter is called "Burden Voltage" and it is the voltage drop caused by the DMM in the measurement circuit. It should be kept as low as possible. The voltage drop of the DMM includes :

- the voltage drop in the cables from the circuit under test to the main DMM PCB.

- the voltage drop in the shunt resistor.

- the voltage drop in the fuse, which vary with the current amount.

I will give an example, how the burden voltage can be a blocker issue. In the example I will use the internal idle power consumption for the Xilinx Spartan 6 FPGA. The power supply voltage Vccint of the FPGA core have nominal value of 1.23V, but if the value drop below 1.2V, the FPGA can stop to work. That means that no more than 30 mV should be the burden voltage of the DMM used for measurement. The quiescent Vccint supply current (idle current) of the Spartan 6 LX150 is 51mA and lets check if we can measure it using these high end DMM:

- The Fluke 8508A have 1.2 Ohms input impedance for 200mA range, which will generate 61.2mV voltage drop. But using 2A range with 0.3 input impedance this will generate only 15.3mV voltage drop.

- The Transmille 8081 have 10 Ohms input impedance for 200mA range, which will generate 510mV voltage drop. But using 1A range with 0.5 input impedance this will generate only 25.5mV voltage drop.
- The Keysight 3458A have 10 Ohms shunt resistor for 100mA range, which will generate minimum 510mV drop voltage (without voltage drop over the fuse). For the 1A range, the shunt resistor is 0.1 Ohms, which will generate 5.1mV voltage drop.

- The Keithley 2002 have maximum burden voltage 0.35V for the 200mA range. The burden voltage for 51mA is : 0.35V*(0.051A/0.2A) =  0.08925 V which exceed the maximum allowed voltage drop with ~40mV. But if the 2A current range is used, the maximum burden voltage is 1.1V, which will generate 28mV voltage drop which is in the 30mV range limit (1.1V*(0.051A/2A) = 0.02805V).

Given examples above shows, that in mA ranges the voltage drop can be blocker issue, but using the A range, user can measure the idle current for the Xilinx Spartan 6 FPGA. These examples are not only valid for the mention high end DMM, but also for the low and middle class DMM.

One workaround for the burden voltage issue is the uCurrent™ product made by Dave Jones from eevblog.com. It is an adapter, which use lower shunt values and amplifies the voltage drop. Here the trade-off is the missing current protection.

LTZ1000 based proto board arrived

I just got my prototyping PCB for LTZ1000 voltage reference characterization: 

The PCB is based on the standard schematics in the LTZ1000 datasheet. Only the dual channel op amp LT1013 is replaced with 2xLTC2057. All critical resistors are from Vishay's PTF series with 5ppm/°C TC. The LTZ1000 will be not soldered directly to the PCB, but through 8 pin socket. For every resistor, there is a jumper where additional resistor can be added. By this way characterization of the output voltage can be made with simulation of resistor change.

This time I used www.elecrow.com PCB service instead of my usual OSHPark because I didn't need ENIG and looked for a cheap and fast delivery. I ordered the PCB on 30th September, but the company was closed for the next 7 days due to China's golden week. I was surprised when I got an e-mail from the company at 8th October that the PCB was shipped with DHL. After 12 days, I had the PCB. I pay 4.9 USD for 2 layer, 5x5 cm PCB plus 3.72 USD for delivery to Europe. I highly recommend this service for fast prototyping.

So in the next days I will solder the parts and will start monitoring and characterizing  the LTZ1000 voltage reference.

DMM mode selection: schematics and base breadboarding (Part 3)

In this part I will explain the DMM mode selection schematics and will implement the base logic in a breadboard.

The schematic is given below:

There are 4 push buttons for each mode, with debounce circuit connected to Shmitt inverters. Output of the inverters are connected to one of the input of the OR logic gate. The second input is connected to GPIO pins of the microcontroller. By this way the DMM modes can be controlled via push buttons or via remote interface like GPIO/RS232/USB etc. Additional logic gates can be put here to disable/enable manual switch or remote control.

Every output of the OR gates are connected to own D flip-flop and to 4-input OR gate. The output of the 4 input OR gates is connected to CLK pin of every D flip-flop.

When one of the push button is connected, the clock signal is generated from the 4 input OR gate output. This clock signal will force every D flip-flip to "remember" his input until the next clock edge. By this way every time when one push button is pressed, only one of the D flip-flops output becomes logical 1 and the rest are in logical 0 state. This is what we needed according to the switch table in the part 1 : every mode connect one switch, except for 2W/4W resistance where the voltmeter switch must be closed as well:

Measurement	SW VM	SW CM	SW 2W	SW FB2W	SW FB4W
Voltage	CLOSED	OPEN	OPEN	OPEN	OPEN
Current	OPEN	CLOSED	OPEN	OPEN	OPEN
Resistance 2W	CLOSED	OPEN	CLOSED	CLOSED	OPEN
Resistance 4W	CLOSED	OPEN	OPEN	OPEN	CLOSED

This additional requirement can be realized with additional 2-input OR gate connected to the output of the 2W/4W D flip-flops and the output connected to another 2-input OR gate connected to Voltmeter D flip-flip. By this way, every time when the 2W/4W resistance is selected, the VM switch will be closed as well.  

The prototype which I made, contain 3 push buttons and output of the every D flip-flop is connected to LED. There is one more LED for CLK signal and one more push button for reset the state of all D flip-flop to 0: 

In the bread board the following IC are used:
- 74174 : 4 D flip-flops.
- 7414 : 6 Inverters with Shmitt inputs.
- 744075 : 3 x 3 input OR logic gate

DMM mode selection: How to make SPDT JFET switch (Part 2)

Following the previous post, I made experiments with JFET switches in single-pole dual-throw configuration. This kind of switches are used in 3 places: switching between voltage and current meters, 2W/4W input of the ohm-meter feedback schematics and in the voltage reference selection switch.

The problem with SPDT configuration using the JFET transistors is the glitches when switching between the two voltage sources. The only instrument which can be used for resolving this issue is oscilloscope, which I did not have until recently. Last 6 months I looking for low cost oscilloscope and finally bought the new Siglent SDS1202X-E :

It is very compact, 2 channel, 200MHz/1GSps oscilloscope with RS232/I2C/SPI/LIN/CAN free decoding options.

The goal of this experiment is to create glitch free SPDT switch using 2 JFET transistor J109 from OnSemi which I had. The SPDT switch connects at one moment only one of it's dual input:

To make this possible, two JFET transistor should be connected together at the Source pin, their Drain pins will be connected to the input voltages. At one time only one of the transistor will be open and the another will be closed. This is realized with signals in opposite direction (logical 1 and 0) which feed the comparators connected to the JFET gates. The positive power supply of the comparators is +15V and the negative is -15V.

Lets start with the push button which will switch between two inputs. I'm using the classic debounce circuit with RC in front of inverting schmitt trigger:

The channel 1 of the scope is connected before the schmitt trigger and channel 2 is connected after it. The scope clear shows that rise time after the RC is around 37 ms, but the signal after the schmitt trigger decrease it to 1.2us.

Next step is to generate two opposite signals every time when the push button is pressed. I will use one more inverter to produce this opposite signal:

In the scope, the first channel shows the signal after the inverter and the second channel shows the signal before the inverter.

Now I have to connect the opposite signals to the input of comparators and to look what will be shown in the output. The used comparator is LM393P with 10K pull-up resistors. The minus input of the comparators are connected to resistor divider which provided 1.5V threshold voltage.

Full schematics
(see the update at the end of the post regarding the diodes)

The output from the connected JFET transistors is 5V when the button is not pressed and -5V when it is pressed:

 If we zoom in to see the transition period we can see the following picture:

When the input voltage is going from +5 to -5V, there are glitches around the -5V with 4V peak to peak value.

If the positive supply of the comparators is decreased to +5V instead using +15V, the transition is much better:

No more glitches and about 130 ns fall time from +5V to -5V.

But when I looked into the transition from -5V to +5V, there are a still lot of glitches:

After increasing the pull-up resistor with 5K, the transition is much better, but still there is small glitch:

And finally after adding small 20pF capacitor between the gate and the ground, the result is much better:

The transition time is increased about 3 times, but the transition glitch is gone.

So the learned lesson is that glitches depends on comparator's positive power supply voltage, pull-up resistors and compensated capacitor between the gate and the ground. Probably using different JFET transistors will change transition picture as well, so the only way is to use always a scope to check for glitches.

Update 2 May 2018: This post was mainly dedicated to removing glitches during switching, but I never check with high resolution DMM if the output voltage is the same as the input one. At the time of writing this post I had only my 3.5 digits KEW 1012 DMM and there was no differences between output and input voltage. However, recently I made the same schematics for my mutli-voltage reference calibration PCB and found that there are several hundreds micro-volts difference measuring with 6.5 digits DMM. After playing with the LTSpice, the problem was resolved with adding a diode between the comparator output and the JFET gate and confirmed with the real measurement. Note that the diode must have minimal reserve current leakage or it is better to use JFET with Igss in the pA range as diode (shorting the Drain and the Source as catode and the Gate as anode). 

DMM mode selection (Part 1)

One of the last things, which I have to find out, is the way of switching between different DMM's measurements : voltage, current and resistance.

In the handheld digital multi-meters, a mechanical rotary selector is used.

In the bench-top DMM, modes are switching electronically with push buttons or with remote interfaces like GPIB/RS-232/USB. This kind of switching requires electromechanical or transistor based relays.

My choice is relays based switching only because of the remote control. 

The electromechanical relays have very simple control, low resistance, slow switching times (millisecond range), limited mechanical life and suffer from thermal EMF effect due different materials used. Of course there are low thermal EMF reed relays like Pickering series 100 with <1 uV and Coto series 3500/3600 with 0.5-10 uV. Unfortunately the low thermal EMF reed relays are expensive and some of them can be purchased only from the manufacturer.

The transistor based relays (JFET/MOSFET/BJT) are very fast (nanoseconds range), needs more complex control, have low thermal EMF, they are cheap and can be purchased from electronics distributors.

Here I selected the JFET based switch because of the lowest noise and the low EMF among the other possibilities.

Of course there are some drawback when JFET transistors are used:
- Voltage offset error due reverse gate-source leakage (Igss). Additionally this parameter is temperature sensitive: roughly doubling every 10°C.
- Glitches (signal transients) during switch on/off due charge injection.
- Normally closed (the switch is turn on by default).
- Control logic is more complex.

Igss is the most important parameter when JFET switch is used for mode selection. When the switch is closed, the value of the Igss multiplied by the input resistance of the circuit under the measurement, will generate voltage error offset. For example, if the Igss is 1pA and circuit resistance is 1MOhms, the voltage offset of 1uV will be generated.

There are not too much JFET transistors, which have Igss in the pA range. Vishay company produced before 2017 the 2N4117A with maximum Igss value of 1pA and typical value of 0.2pA for 25°C. The price was between 4 and 9 USD. The next best transistor, which is currently available on the market, is the MMBF4117 (N-channel) made by On Semiconductor with maximum 10pA Igss for 25°C and price below 0.5 USD.

During JFET search, I found one interesting document from TI for op amp over voltage protection, using JFET as diode (drain and source connected). Later I tried on the breadboard and it was working fine. So, now I think to use this approach for protection of the first op amp, which make unnecessary the +/- 30 V power supply in my post about the initial schematics for the low accuracy voltmeter.

So, back to schematic. Using JFET transistor as switch, needs some extra components when the TTL compatible control logic is used. The N-channel JFET transistor is open (turn off) when the negative voltage applied between Gate and Source is greater than Vgs(off) parameter value of the transistor and more negative than the input signal voltage level. In the case of MMBF4117, the Vgs(off) parameter have maximum value of -1.8V.
The control logic (micro-controller/CPLD/FPGA) usually use TTL levels, so it is better to use analog comparator to drive the JFET transistor. The positive Vcc can be set to 20V and negative should be greater than expected input voltage. In my case this will be -20V. The maximum output current of the comparator must not exceed maximum value of the JFET's  forward gate current.

JFET SPST switch

The final picture of DMM mode selection is shown below. The ohm meter schematics is based on the Linear technology's LTC6081/LTC6082 datasheet, page 14. The following switches are used in the resistance measurement:
- switch "SW VRef" for extending Ohm-meter ranges, when high resistance is measured using 10 times smaller voltage reference. 
- switch "SW FB4W" will be used in 4 wire resistance measurement. In this mode reference resistor "Rref 4W" with value 1K will be used.
- switches "SW FB2W" and "SW 2W" will be used in 2 wire resistance measurement. In this mode reference resistor "Rref 2W" with value 100K will be used. 
Calibration of the resistance measurement will be external for low accuracy and internal for high accuracy version of the DMM. I will use the Vishay H series (VHP202) resistors as secondary resistance standard. According datasheet, the shelf life is 2ppm for 6 years and maximum TCR is 2.5ppm/°C

When voltage is measured, all switches will be switched off and the "SW VM" will be switched on.
When current is measured, all switches will be switched off and the "SW CM" will be switched on.

The switches "SW VM" and "SW CM" are placed after the input buffer to decrease the leakage of the JFET in the front of the input buffer. The output of the buffer is low resistance and the error due these 2 switches can be ignored.

The total leakage in the 2W/V binding post (BP), before the input buffer, will be sum of Igss of the "SW 2W", over voltage protection JFETs and the Ibias of the input buffer. Using MMBF4117 and LTC2057, this means maximum ~ 3*10pA + 200pA = 230pA for 25°C. For comparison the high end DMM like Keithley has <100pA leakage by specification.

It is hard to find low noise, low Ibias, zero-drift and high-voltage op-amp. One alternative is using the LTC1050/1052, which have 30pA maximum Ibias, 0.5/1.5uV LF noise at 1Hz/10Hz and maximum 5uV Vos. The only problem is the low supply voltage of 18V. This can be resolved using bootstrapping technique described in the www.edn.com site.

The status of every JFET switch when particular measurement is performed is given below:

Measurement	SW VM	SW CM	SW 2W	SW FB2W	SW FB4W
Voltage	CLOSED	OPEN	OPEN	OPEN	OPEN
Current	OPEN	CLOSED	OPEN	OPEN	OPEN
Resistance 2W	CLOSED	OPEN	CLOSED	CLOSED	OPEN
Resistance 4W	CLOSED	OPEN	OPEN	OPEN	CLOSED

Update 2 May 2018 : Added a diode between the comparator output and the Gate of the JFET switch. The reason is described at the end of the part 2.

Update 5 June 2019 : I found better way to measure resistance using stable reference resistor and stable, but not precise current source. The current source is applied across the reference resistor and goes through the resistor under test. The voltage drop over the reference resistor will be used as reference voltage of the ADC. By this way the resistance is measured as ration between the resistor under test and the reference resistor. The only thing which I have to realize is switching between the LTC6655 and the reference resistor in front of the LTC2440.  This idea I got during making the digital thermometer using ADS1220 IC.. 

LTC6655 based voltage reference stability after 1 year

Last March 2016, I made my first voltage reference based on LTC6655 BHMS8 and recorded the first stability results. I haven't the time to make PCB and breadboard with low noise LDO and several decoupling capacitors was used. For the first 8 days, using Keithley 2002 DMM, I measured voltage fluctuations in the range of 124 ppm (min 2.500100V, max 2.500410V). 

The result was not so great, but expected because any voltage reference needs hours for stabilization in the long term. The value is specified in the datasheet under long term drift name. In my case, expected long term drift was 60 ppm after the first 1000h. Usually this characteristic has logarithmic nature and with the time is decreasing.

Next measurements were made at September 2016 with better results. After approximately 4000 hours, during period of 2 weeks measurement, I got 52 ppm stability : min 2.500320V, max 2.500450V.

The last measurements, made in April 2017 were much better. The result was 5.2 ppm stability: min 2.500255V, max 2.500268V. This result was more with regard of the room's temperature changes. According the datasheet, the expected temperature coefficient has typical value of 1 ppm/°C and maximum value of 2 ppm/°C. The recorded temperature difference in the room was 7°C (17°C-24°C). This is less then 1 ppm/°C. All measurements were performed automatically for about 70 hours during period of 9 days. If I compare them with the last September results, they are within 25 and 70 ppm range for about 5000 hours period.

All measurements for the last year were made with the same DMM. It was calibrated in March 2016 and March 2017.  

I will keep running the voltage reference for the next 12 mounts. I want to collect voltage drift data after stabilization to figure out the expected DMM accuracy using this low priced voltage reference.

Project status update, March 2017

I will use this post to give some updates for the status of openDCM project for the last 4 months. 

During this period I tried to collect information about calibration process and had contact with two National Measurement Institutes about possibility to calibrate direct DC voltage reference standard. The prices were reasonable for calibration against Josephson voltage standard (around 500 Euro for ±0.02 ppm uncertainty) and against Fluke 7010N/T (around 100 Euro for ±0.8 ppm uncertainty).

Voltage reference standards on the market costs several thousand USD (even for the second hand) and they are not affordable for me. Voltmeter calibrators costs even more. So I started digging into this area and found the excellent thread about LTZ1000 based voltage reference. Even with the most expensive Vishay HZ series resistors, stable 7 to 10V amplifying, gold plated tellurium copper banana jacks, and low EMF cables it will cost less then 500 EUR. The cost here is very important, because for the good calibration practice I have to make 3 or 4 voltage references. For the voltmeter calibration and linearity testing, I'm thinking to use a PWM voltage divider and the LTZ1000 based voltage reference.

One more thing, which I'm thinking to build is a null voltmeter detector. It is used to compare two voltage sources if they are equal. Using this tool I can transfer the hot calibrated voltage reference to other voltage references and to check drift between them.

My plan for 2017 year is to finish the low accuracy openDCM prototype and to start working on the calibration process (voltage standard, null meter, PWM voltage divider) and the high accuracy prototype based on the LTZ1000 reference and multi-slope architecture.  

The reason for starting this project was found in a shoebox :-)

Finally, I found my lost Kyoritsu DMM KEW1012 in a old shoe box.

Now after almost one year of research and all the knowledge, which I collected about the measurements, I have feeling that this DMM is like a toy. His basic DC accuracy is ±0.5% ±2 digits and the input impedance is 10MOhms for the useful ranges.

Even if my calculations for the first voltmeter prototype are 10 times worst, it will be still 50 times better then the specification of the KEW 1012 DMM. 

Nevertheless, I can still use this DMM for the high voltage ranges and for the frequency and duty cycle measurements. So, I will not throws it in the bin for sure :-).